Over the last few decades, the semiconductor industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices, and the most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is one of the basic building blocks of most modern electronic circuits. Importantly, these electronic circuits realize improved performance and lower costs, as the performance of the MOS transistor is increased and as manufacturing costs are reduced.
A typical MOS semiconductor device includes a semiconductor substrate on which a gate electrode is disposed over a gate dielectric. The gate electrode, which acts as a conductor, receives an input signal to control operation of the device. Source and drain regions are typically formed in regions of the substrate adjacent the gate electrodes by doping the regions with a dopant of a desired conductivity. The conductivity of the doped region depends on the type of impurity used to dope the region. The typical MOS transistor is symmetrical, in that the source and drain are interchangeable. Whether a region acts as a source or drain typically depends on the respective applied voltages and the type of device being made. The collective term source/drain region is used herein to generally describe an active region used for the formation of either a source or drain.
Ion implantation of dopant species is used throughout the process in the fabrication of MOS transistors. Implants are used to selectively dope regions to form conductive pathways in the silicon wafer and for other purposes. Ion implantation is a good method for introducing dopants because during manufacture, the dose and energy at which the species are introduced can be controlled very accurately. One drawback of ion implantation is the creation of a damaged region that includes defects in the silicon lattice or other layers, such as oxide, nitride or polysilicon layers, which have adverse effects on transistor fabrication at later steps. One defect is the creation of amorphous silicon which must be annealed to return it to its crystalline state. This anneal is an added thermal cycle which must be taken into account when designing both n-channel and p-channel transistors.
An anneal can occur in a furnace or in a rapid-thermal-anneal (“RTA”) chamber. An RTA process is typically performed at between 400 and 1150° C. and lasts anywhere from a few seconds to a few minutes. Large area incoherent energy sources provide uniform heating of the wafers. These sources emit radiant light which allows very rapid and uniform heating and cooling. Wafers are thermally isolated so that radiant (not conductive) heating and cooling is dominant. Various heat sources are utilized, including arc lamps, tungsten-halogen lamps, and resistively-heated slotted graphite sheets. Most heating is performed in inert atmospheres (argon or nitrogen) or vacuum, although oxygen or ammonia can be used for respectively growing silicon dioxide and silicon nitride.
The RTA anneal cycle, however, takes away from the thermal budget of the semiconductor device, and the RTA annealing also provides the heat for already present dopants and the just implanted dopants to diffuse. As a byproduct to the anneal cycle, dopants segregate and migrate in a vertical as well as horizontal direction. Diffusion causes enlargement of the doped areas, which in certain instances, leads to enhanced parasitic problems. Furthermore, diffusion of low-density dopants into the channel causes enhanced short channel effect problems. While it is desirable to anneal implant damage, a need exists for a more effective method for repairing implant damage while minimizing the migration of implanted dopants.